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Drive architectural investigations, workload characterization, and PnP analysis on SoCs. Collaborate with design teams to enhance performance and power efficiency in silicon platforms.

As an Intern Network Performance Engineer, you will analyze software performance, contribute to optimizations, create micro-benchmarks, and present findings in various formats.

Seeking a SoC Performance and Power Modeling Architect with extensive experience in performance modeling, workload characterization, and architectural solutions for semiconductor design.

The role involves designing optimized system architectures for automotive and robotics applications using machine learning. Responsibilities include performance analysis and collaboration with various engineering teams. Required experience includes AI/ML algorithm architecture and knowledge of computer architecture.

The Graduate GPU Modeling Engineer will prototype GPU architecture improvements and collaborate on hardware development with a focus on high performance computing.

The RTL Design Engineer will design and analyze high-performance interconnects, ensuring they meet functional, performance, power, and area goals.

Lead offensive security analysis for SoC and chiplet architectures, identifying vulnerabilities and influencing security practices across projects.

Develop and optimize signoff methodologies for silicon design, focusing on PPA, reliability, and implementing automation with AI techniques.

Develop SoC design flows and automation processes to optimize power, performance, area, and silicon quality while collaborating with various partners.

As an Ecosystem Development Intern, you will research AI technology stacks, support go-to-market activities, coordinate partner engagements, and create content for technical understanding.